1. Field of the Invention
The present invention relates to methods for forming semiconductor structures, and more particularly to methods for forming capacitor structures.
2. Description of the Related Art
With advances in electronic products, semiconductor technology has been applied widely in manufacturing memories, central processing units (CPUs), liquid crystal displays (LCDs), light emitting diodes (LEDs), laser diodes and other devices or chip sets. In order to achieve high-integration and high-speed requirements, dimensions of semiconductor integrated circuits have been reduced and various materials, such as copper and ultra low-k dielectrics, have been proposed and are being used along with techniques for overcoming manufacturing obstacles associated with these materials and requirements. Further, high-linearity metal-oxide-semiconductor (MOS) capacitors and methods for forming MOS capacitors have been proposed to form capacitors during a front-end process, i.e., before the formation of an inter layer dielectric (ILD) layer.
FIG. 1 is a cross-sectional view of a traditional high-linearity metal-oxide-semiconductor (MOS) capacitor. A blank silicon substrate 100 is provided. An implantation process is conducted so as to form a bottom electrode 110 within the blank silicon substrate 100. After implanting dopants within the bottom electrode 110, an oxide layer 120 is formed over the bottom electrode 110. A polysilicon layer 130 is then formed over the oxide layer 120. The oxide layer 120 and the polysilicon layer 130 are a capacitor dielectric layer and a top electrode of a capacitor, respectively.